Hardware Implementation of Binary Arithmetic Decoder in HEVC CABAC Decoder
نویسندگان
چکیده
منابع مشابه
Design and Implementation of a High-Throughput CABAC Hardware Accelerator for the HEVC Decoder
HEVC is the new video coding standard of the Joint Collaborative Team on Video Coding. As in its predecessor H.264/AVC, Context-based Adaptive Binary Arithmetic Coding (CABAC) is a throughput bottleneck. This paper presents a hardware acceleration approach for transform coefficient decoding, the most time consuming part of CABAC in HEVC. In addition to a baseline design, a pipelined architectur...
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One way to save the power consumption in the H.264 decoder is for the H.264 encoder to generate decoderfriendly bit streams. By following this idea, a decoding complexity model of context-based adaptive binary arithmetic coding (CABAC) for H.264/AVC is investigated in this research. Since different coding modes will have an impact on the number of quantized transformed coefficients (QTCs) and m...
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ژورنال
عنوان ژورنال: Journal of IKEEE
سال: 2016
ISSN: 1226-7244
DOI: 10.7471/ikeee.2016.20.4.435